MINI MINI MANI MO
/* Generated automatically by the program `genconstants'
from the machine description file `md'. */
#ifndef GCC_INSN_CONSTANTS_H
#define GCC_INSN_CONSTANTS_H
#define XMM9_REG 46
#define R13_REG 42
#define XMM14_REG 51
#define ROUND_CEIL 0x2
#define PCOM_TRUE 1
#define PPERM_SRC 0x00
#define PPERM_ZERO 0x80
#define MM7_REG 36
#define XMM6_REG 27
#define ST3_REG 11
#define R10_REG 39
#define XMM11_REG 48
#define FLAGS_REG 17
#define ST1_REG 9
#define MM4_REG 33
#define ROUND_NO_EXC 0x8
#define COM_FALSE_P 3
#define XMM3_REG 24
#define ST0_REG 8
#define COM_FALSE_S 2
#define SP_REG 7
#define AX_REG 0
#define R8_REG 37
#define XMM0_REG 21
#define XMM8_REG 45
#define ST5_REG 13
#define R12_REG 41
#define R9_REG 38
#define ROUND_MXCSR 0x4
#define PCOM_FALSE 0
#define FPSR_REG 18
#define PPERM_INVERT 0x20
#define MM6_REG 35
#define MM1_REG 30
#define PPERM_SRC1 0x00
#define PPERM_SRC2 0x10
#define XMM5_REG 26
#define ST2_REG 10
#define XMM10_REG 47
#define ROUND_TRUNC 0x3
#define DI_REG 5
#define DX_REG 1
#define MM3_REG 32
#define XMM12_REG 49
#define COM_TRUE_P 5
#define XMM4_REG 25
#define COM_TRUE_S 4
#define ROUND_FLOOR 0x1
#define ST6_REG 14
#define ST7_REG 15
#define R14_REG 43
#define XMM15_REG 52
#define R15_REG 44
#define XMM13_REG 50
#define PPERM_SIGN 0xc0
#define MM0_REG 29
#define BP_REG 6
#define BX_REG 3
#define XMM7_REG 28
#define ST4_REG 12
#define PPERM_INV_SIGN 0xe0
#define R11_REG 40
#define PPERM_REV_INV 0x60
#define MM5_REG 34
#define PPERM_REVERSE 0x40
#define CX_REG 2
#define SI_REG 4
#define XMM2_REG 23
#define PPERM_ONES 0xa0
#define MM2_REG 31
#define XMM1_REG 22
#define FPCR_REG 19
enum unspec {
UNSPEC_GOT = 0,
UNSPEC_GOTOFF = 1,
UNSPEC_GOTPCREL = 2,
UNSPEC_GOTTPOFF = 3,
UNSPEC_TPOFF = 4,
UNSPEC_NTPOFF = 5,
UNSPEC_DTPOFF = 6,
UNSPEC_GOTNTPOFF = 7,
UNSPEC_INDNTPOFF = 8,
UNSPEC_PLTOFF = 9,
UNSPEC_MACHOPIC_OFFSET = 10,
UNSPEC_PCREL = 11,
UNSPEC_STACK_ALLOC = 12,
UNSPEC_SET_GOT = 13,
UNSPEC_SET_RIP = 14,
UNSPEC_SET_GOT_OFFSET = 15,
UNSPEC_MEMORY_BLOCKAGE = 16,
UNSPEC_STACK_CHECK = 17,
UNSPEC_TP = 18,
UNSPEC_TLS_GD = 19,
UNSPEC_TLS_LD_BASE = 20,
UNSPEC_TLSDESC = 21,
UNSPEC_TLS_IE_SUN = 22,
UNSPEC_SCAS = 23,
UNSPEC_FNSTSW = 24,
UNSPEC_SAHF = 25,
UNSPEC_PARITY = 26,
UNSPEC_FSTCW = 27,
UNSPEC_ADD_CARRY = 28,
UNSPEC_FLDCW = 29,
UNSPEC_REP = 30,
UNSPEC_LD_MPIC = 31,
UNSPEC_TRUNC_NOOP = 32,
UNSPEC_DIV_ALREADY_SPLIT = 33,
UNSPEC_MS_TO_SYSV_CALL = 34,
UNSPEC_PAUSE = 35,
UNSPEC_LEA_ADDR = 36,
UNSPEC_XBEGIN_ABORT = 37,
UNSPEC_STOS = 38,
UNSPEC_FIX_NOTRUNC = 39,
UNSPEC_MASKMOV = 40,
UNSPEC_MOVMSK = 41,
UNSPEC_RCP = 42,
UNSPEC_RSQRT = 43,
UNSPEC_PSADBW = 44,
UNSPEC_COPYSIGN = 45,
UNSPEC_IEEE_MIN = 46,
UNSPEC_IEEE_MAX = 47,
UNSPEC_SIN = 48,
UNSPEC_COS = 49,
UNSPEC_FPATAN = 50,
UNSPEC_FYL2X = 51,
UNSPEC_FYL2XP1 = 52,
UNSPEC_FRNDINT = 53,
UNSPEC_FIST = 54,
UNSPEC_F2XM1 = 55,
UNSPEC_TAN = 56,
UNSPEC_FXAM = 57,
UNSPEC_FRNDINT_FLOOR = 58,
UNSPEC_FRNDINT_CEIL = 59,
UNSPEC_FRNDINT_TRUNC = 60,
UNSPEC_FRNDINT_MASK_PM = 61,
UNSPEC_FIST_FLOOR = 62,
UNSPEC_FIST_CEIL = 63,
UNSPEC_SINCOS_COS = 64,
UNSPEC_SINCOS_SIN = 65,
UNSPEC_XTRACT_FRACT = 66,
UNSPEC_XTRACT_EXP = 67,
UNSPEC_FSCALE_FRACT = 68,
UNSPEC_FSCALE_EXP = 69,
UNSPEC_FPREM_F = 70,
UNSPEC_FPREM_U = 71,
UNSPEC_FPREM1_F = 72,
UNSPEC_FPREM1_U = 73,
UNSPEC_C2_FLAG = 74,
UNSPEC_FXAM_MEM = 75,
UNSPEC_SP_SET = 76,
UNSPEC_SP_TEST = 77,
UNSPEC_SP_TLS_SET = 78,
UNSPEC_SP_TLS_TEST = 79,
UNSPEC_ROUND = 80,
UNSPEC_CRC32 = 81,
UNSPEC_BEXTR = 82,
UNSPEC_PDEP = 83,
UNSPEC_PEXT = 84,
UNSPEC_MOVNTQ = 85,
UNSPEC_PFRCP = 86,
UNSPEC_PFRCPIT1 = 87,
UNSPEC_PFRCPIT2 = 88,
UNSPEC_PFRSQRT = 89,
UNSPEC_PFRSQIT1 = 90,
UNSPEC_MOVNT = 91,
UNSPEC_LOADU = 92,
UNSPEC_STOREU = 93,
UNSPEC_LDDQU = 94,
UNSPEC_PSHUFB = 95,
UNSPEC_PSIGN = 96,
UNSPEC_PALIGNR = 97,
UNSPEC_EXTRQI = 98,
UNSPEC_EXTRQ = 99,
UNSPEC_INSERTQI = 100,
UNSPEC_INSERTQ = 101,
UNSPEC_BLENDV = 102,
UNSPEC_INSERTPS = 103,
UNSPEC_DP = 104,
UNSPEC_MOVNTDQA = 105,
UNSPEC_MPSADBW = 106,
UNSPEC_PHMINPOSUW = 107,
UNSPEC_PTEST = 108,
UNSPEC_PCMPESTR = 109,
UNSPEC_PCMPISTR = 110,
UNSPEC_FMADDSUB = 111,
UNSPEC_XOP_UNSIGNED_CMP = 112,
UNSPEC_XOP_TRUEFALSE = 113,
UNSPEC_XOP_PERMUTE = 114,
UNSPEC_FRCZ = 115,
UNSPEC_AESENC = 116,
UNSPEC_AESENCLAST = 117,
UNSPEC_AESDEC = 118,
UNSPEC_AESDECLAST = 119,
UNSPEC_AESIMC = 120,
UNSPEC_AESKEYGENASSIST = 121,
UNSPEC_PCLMUL = 122,
UNSPEC_PCMP = 123,
UNSPEC_VPERMIL = 124,
UNSPEC_VPERMIL2 = 125,
UNSPEC_VPERMIL2F128 = 126,
UNSPEC_CAST = 127,
UNSPEC_VTESTP = 128,
UNSPEC_VCVTPH2PS = 129,
UNSPEC_VCVTPS2PH = 130,
UNSPEC_VPERMVAR = 131,
UNSPEC_VPERMTI = 132,
UNSPEC_GATHER = 133,
UNSPEC_VSIBADDR = 134,
UNSPEC_LFENCE = 135,
UNSPEC_SFENCE = 136,
UNSPEC_MFENCE = 137,
UNSPEC_MOVA = 138,
UNSPEC_LDA = 139,
UNSPEC_STA = 140
};
#define NUM_UNSPEC_VALUES 141
extern const char *const unspec_strings[];
enum unspecv {
UNSPECV_BLOCKAGE = 0,
UNSPECV_STACK_PROBE = 1,
UNSPECV_PROBE_STACK_RANGE = 2,
UNSPECV_ALIGN = 3,
UNSPECV_PROLOGUE_USE = 4,
UNSPECV_SPLIT_STACK_RETURN = 5,
UNSPECV_CLD = 6,
UNSPECV_NOPS = 7,
UNSPECV_RDTSC = 8,
UNSPECV_RDTSCP = 9,
UNSPECV_RDPMC = 10,
UNSPECV_LLWP_INTRINSIC = 11,
UNSPECV_SLWP_INTRINSIC = 12,
UNSPECV_LWPVAL_INTRINSIC = 13,
UNSPECV_LWPINS_INTRINSIC = 14,
UNSPECV_RDFSBASE = 15,
UNSPECV_RDGSBASE = 16,
UNSPECV_WRFSBASE = 17,
UNSPECV_WRGSBASE = 18,
UNSPECV_FXSAVE = 19,
UNSPECV_FXRSTOR = 20,
UNSPECV_FXSAVE64 = 21,
UNSPECV_FXRSTOR64 = 22,
UNSPECV_XSAVE = 23,
UNSPECV_XRSTOR = 24,
UNSPECV_XSAVE64 = 25,
UNSPECV_XRSTOR64 = 26,
UNSPECV_XSAVEOPT = 27,
UNSPECV_XSAVEOPT64 = 28,
UNSPECV_RDRAND = 29,
UNSPECV_RDSEED = 30,
UNSPECV_XBEGIN = 31,
UNSPECV_XEND = 32,
UNSPECV_XABORT = 33,
UNSPECV_XTEST = 34,
UNSPECV_NLGR = 35,
UNSPECV_PKU = 36,
UNSPECV_EMMS = 37,
UNSPECV_FEMMS = 38,
UNSPECV_LDMXCSR = 39,
UNSPECV_STMXCSR = 40,
UNSPECV_CLFLUSH = 41,
UNSPECV_MONITOR = 42,
UNSPECV_MWAIT = 43,
UNSPECV_VZEROALL = 44,
UNSPECV_VZEROUPPER = 45,
UNSPECV_CMPXCHG = 46,
UNSPECV_XCHG = 47,
UNSPECV_LOCK = 48
};
#define NUM_UNSPECV_VALUES 49
extern const char *const unspecv_strings[];
#endif /* GCC_INSN_CONSTANTS_H */
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